XC7Z020-2CLG484I SOC CORTEX-A9 766MHZ 484BGA IC

• shape: Flat
• Conductive Type: Bipolar Integrated Circuit
• Integration: MSI
• Technics: Semiconductor IC
• Application: Standard Generalized Integrated Circuit
• Type: Digital / Analog IC
• Model NO.: XC7Z020-2CLG484I
• MFG.: XILINX
• D/C: 22+
• Package: CSPBGA-484
• Quality: Genuine New Original
• Transport Package: Box
• Origin: China
• HS Code: 8542399000
• Production Capacity: 1000000PCS

Product Description

Description

XC7Z020-2CLG484I : MPU Zynq-7000 Thumb-2 32-Bit 733MHz 1.2V/3.3V 484-Pin CSBGA

Mfr. Part#:   XC7Z020-2CLG484I

Datasheet: (e-mail or chat us for PDF file)

ROHS Status: 

Quality: 100% Original

Warranty: ONE YEAR

Mfr	AMD
Series	Zynq®-7000
Package	Tray
Product Status	Active
Architecture	MCU, FPGA
Core Processor	Dual ARM® Cortex®-A9 MPCore™ with CoreSight™
Flash Size	-
RAM Size	256KB
Peripherals	DMA
Connectivity	CANbus, EBI/EMI, Ethernet, I²C, MMC/SD/SDIO, SPI, UART/USART, USB OTG
Speed	766MHz
Primary Attributes	Artix™-7 FPGA, 85K Logic Cells
Operating Temperature	-40°C ~ 100°C (TJ)
Package / Case	484-LFBGA, CSPBGA
Supplier Device Package	484-CSPBGA (19x19)
Number of I/O	130
Base Product Number	XC7Z020

 

The Zynq-7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core ARM Cortex-A9 based processing system (PS) and 28 nm Xilinx programmable logic (PL) in a single device. The ARM Cortex-A9 CPUs are the heart of the PS and also include on-chip memory, external memory interfaces, and a rich set of peripheral connectivity interfaces.

Key Features

• Dual-core ARM Cortex-A9 Based Application Processor Unit (APU)
• 2.5 DMIPS/MHz per CPU
• CPU frequency: Up to 1 GHz
• Coherent multiprocessor support
• ARMv7-A architecture
• TrustZone security
• Thumb-2 instruction set
• Jazelle RCT execution Environment Architecture
• NEON media-processing engine
• Single and double precision Vector Floating Point Unit (VFPU)
• CoreSight™ and Program Trace Macrocell (PTM)
• Timer and Interrupts
• 32 KB Level 1 4-way set-associative instruction and data caches (independent for each CPU)
• 512 KB 8-way set-associative Level 2 cache (shared between the CPUs)
• Byte-parity support
• On-chip boot ROM
• 256 KB on-chip RAM (OCM)
• Byte-parity support
• Multiprotocol dynamic memory controller
• 16-bit or 32-bit interfaces to DDR3, DDR3L, DDR2, or LPDDR2 memories
• ECC support in 16-bit mode
• 1GB of address space using single rank of 8-, 16-, or 32-bit-wide memories
• Static memory interfaces
• Two 10/100/1000 tri-speed Ethernet MAC peripherals with IEEE Std 802.3 and IEEE Std 1588 revision 2.0 support
• Two USB 2.0 OTG peripherals, each supporting up to 12 Endpoints
• Two SD/SDIO 2.0/MMC3.31 compliant controllers
• Two full-duplex SPI ports with three peripheral chip selects
• Two high-speed UARTs (up to 1 Mb/s)
• Two master and slave I2C interfaces
• GPIO with four 32-bit banks, of which up to 54 bits can be used with the PS I/O (one bank of 32b and one bank of 22b) and up to 64 bits (up to two banks of 32b) connected to the Programmable Logic
• Up to 54 flexible multiplexed I/O (MIO) for peripheral pin assignments
• True Dual-Port
• Up to 72 bits wide
• Configurable as dual 18 Kb

 

 

 

 

Why choosing us

• Located in Shenzhen, the electronic market center of China.
• 100% guarantee components quality: Genuine Original.
• Sufficient stock on your urgent demand.
• Sophisticated colleagues help you solve problems to reduce your risk with on-demand manufacturing
• Faster shipment: In stock components can ship the same day .
• 24 Hours service 

 

Notice:

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