Customization: | Available |
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Conductive Type: | Bipolar Integrated Circuit |
Integration: | MSI |
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ATMEGA64A-AU: MCU 8-bit ATmega AVR RISC 64KB Flash 3.3V/5V 64-Pin TQFP
Package: TQFP-64
Mfr. Part#: ATMEGA64A-AU
Mfr.: MICROCHIP
Datasheet: (e-mail or chat us for PDF file)
ROHS Status:
Quality: 100% Original
Warranty: 180 days
Mounting Style: | SMD/SMT |
Package / Case: | TQFP-64 |
Core: | AVR |
Program Memory Size: | 64 kB |
Data Bus Width: | 8 bit |
ADC Resolution: | 10 bit |
Maximum Clock Frequency: | 16 MHz |
Number of I/Os: | 53 I/O |
Data RAM Size: | 4 kB |
Supply Voltage - Min: | 2.7 V |
Supply Voltage - Max: | 5.5 V |
Minimum Operating Temperature: | - 40 C |
Maximum Operating Temperature: | + 85 C |
Packaging: | Tray |
Brand: | Microchip Technology |
Data RAM Type: | SRAM |
Data ROM Size: | 2 kB |
Data ROM Type: | EEPROM |
Height: | 1 mm |
Interface Type: | SPI, USART |
Length: | 14 mm |
Moisture Sensitive: | Yes |
Number of Timers/Counters: | 4 Timer |
Processor Series: | megaAVR |
Product: | MCU |
Product Type: | 8-bit Microcontrollers - MCU |
Program Memory Type: | Flash |
Factory Pack Quantity: | 90 |
Subcategory: | Microcontrollers - MCU |
Tradename: | AVR |
Width: | 14 mm |
Unit Weight: | 0.030336 oz |
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega64A provides the following features: 64 Kbytes In-System Programmable Flash with ReadWhile- Write capabilities, 2 Kbytes EEPROM, 4 Kbytes SRAM, 53 general purpose I/O lines, 32 general purpose working registers, Real Time Counter (RTC), four flexible Timer/Counters with compare modes and PWM, two USARTs, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC with optional differential input stage with programmable gain, programmable Watchdog Timer with internal Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for accessing the On-chip Debug system and programming, and six software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low power consumption. In Extended Standby mode, both the main Oscillator and the asynchronous timer continue to run.
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