| Customization: | Available |
|---|---|
| Conductive Type: | Unipolar Integrated Circuit |
| Integration: | LSI |
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MT29F2G01ABAGDWB-IT:G : FLASH - NAND Memory IC 2Gbit SPI 8-UPDFN (8x6) (MLP8)
Mfr. Part#: MT29F2G01ABAGDWB-IT:G
Mfr.: MICRON
Datasheet: 
(e-mail or chat us for PDF file)
ROHS Status:
Quality: 100% Original
Warranty: ONE YEAR
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Memory Type
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Non-Volatile
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Memory Format
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FLASH
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Technology
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FLASH - NAND
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Memory Size
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2Gbit
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Memory Organization
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2G x 1
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Memory Interface
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SPI
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Write Cycle Time - Word, Page
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-
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Voltage - Supply
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2.7V ~ 3.6V
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Operating Temperature
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-40°C ~ 85°C (TA)
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Mounting Type
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Surface Mount
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Package / Case
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8-UDFN
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Supplier Device Package
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8-UPDFN (8x6) (MLP8)
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Base Product Number
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MT29F2G01
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NAND technology provides a cost-effective solution for applications requiring highdensity solid-state storage. The MT29F2G08AxB and MT29F2G16AxB are 2Gb NAND Flash memory devices. The MT29F4G08BxB and MT29F4G16BxB are two-die stacks that operate as a single 4Gb device. The MT29F8G08FAB is a four-die stack that operates as two independent 4Gb devices (MT29F4G08BxB), providing a total storage capacity of 8Gb in a single, space-saving package. Micron NAND Flash devices include standard NAND features as well as new features designed to enhance system-level performance. Micron NAND Flash devices use a highly multiplexed 8- or 16-bit bus (I/O[7:0] or I/O[15:0]) to transfer data, addresses, and instructions. The five command pins (CLE, ALE, CE#, RE#, WE#) implement the NAND command bus interface protocol. Three additional pins control hardware write protection (WP#), monitor device status (R/B#), and initiate the auto-read feature (PRE-3V device only). Note that the PRE function is not supported on extended-temperature devices. This hardware interface creates a low-pin-count device with a standard pinout that is the same from one density to another, allowing future upgrades to higher densities without board redesign. MT29F2G and MT29F4G devices contain 2,048 and 4,096 erasable blocks respectively. Each block is subdivided into 64 programmable pages. Each page consists of 2,112 bytes (x8) or 1,056 words (x16). The pages are further divided into a 2,048-byte data storage region with a separate 64-byte area on the x8 device; and on the x16 device, separate 1,024-word and 32-word areas. The 64-byte and 32-word areas are typically used for error management functions. The contents of each 2,112-byte page can be programmed in 300µs, and an entire 132Kbyte/66K word block can be erased in 2ms. On-chip control logic automates PROGRAM and ERASE operations to maximize cycle endurance. ERASE/PROGRAM endurance is specified at 100,000 cycles when using appropriate error correcting code (ECC) and error management.
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