HEF4017BT Counter/Divider Single 5-Bit Decade IC

• shape: hqfp64
• Conductive Type: Bipolar Integrated Circuit
• Integration: MSI
• Shipping Cost: Estimated freight per unit.: about shipping cost and estimated delivery time.
• Currency: US$
• Return&refunds: You can apply for a refund up to 30 days after receipt of the products.
• Model NO.: HEF4017BT
• Technics: Semiconductor IC
• MFG.: NEXPERIA
• D/C: 22+
• Package: SOIC14
• Quality: Genuine New Original
• Transport Package: Box
• Origin: China
• HS Code: 8542399000
• Production Capacity: 1000000PCS
• Package Size: 20.00cm * 20.00cm * 10.00cm
• Package Gross Weight: 1.000kg

Product Description

Description

HEF4017BT: Counter ICs HEF4017BT/SOT109/SO16

Mfr. Part#: HEF4017BT

Mfr.: NEXPERIA

Datasheet: (e-mail or chat us for PDF file)

ROHS Status: 

Quality: 100% Original

Warranty: ONE YEAR
 

 

Mounting Style:	SMD/SMT
Package / Case:	SOIC-16
Counter Type:	Decade
Logic Family:	HEF4017B
Number of Bits:	10 bit
Operating Supply Voltage:	3 V to 15 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 85 C
Packaging:	Reel
Packaging:	Cut Tape
Packaging:	Reel
Brand:	Nexperia
Operating Temperature Range:	- 40 C to + 85 C
Product Type:	Counter ICs
Factory Pack Quantity:	2500
Subcategory:	Counter ICs
Part # Aliases:	933372700653
Unit Weight:	0.008818 oz

The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active HIGH outputs (Q0 to Q9), an active LOW carry output from the most significant flip-flop (Q5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a HIGH-to-LOW transition at CP1 while CP0 is HIGH (see Table 3). When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5, 6, 7, 8, and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0, CP1). Automatic counter code correction is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses. Schmitt trigger action makes the clock inputs highly tolerant of slower rise and fall times. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.

FEATURES
Automatic counter correction
Tolerant of slow clock rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from -40ºC to +125ºC
Complies with JEDEC standard JESD 13-B

 

Why choosing us

• Located in Shenzhen, the electronic market center of China.
• 100% guarantee components quality: Genuine Original.
• Sufficient stock on your urgent demand.
• Sophisticated colleagues help you solve problems to reduce your risk with on-demand manufacturing
• Faster shipment: In stock components can ship the same day .
• 24 Hours service 

 

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