IC Flip Flop D-Type Pos-Edge CD4013BM96

• Customization: Available
• Conductive Type: Unipolar Integrated Circuit
• Integration: LSI
• Model NO.: CD4013BM96
• Technics: Thick Film IC
• MFG.: TI
• D/C: 17+
• Package: SOIC-14
• Quality: Genuine New Original
• shape: SMD
• Transport Package: Box
• Origin: China
• HS Code: 8542390000
• Production Capacity: 1000000PCS

Product Description

Description

CD4013BM96: Flip Flop D-Type Pos-Edge 2-Element 14-Pin SOIC T/R 

Package: SOIC-14

Mfr. Part#: CD4013BM96

Mfr.:TI

Datasheet: (e-mail or chat us for PDF file)

ROHS Status: 

Quality: 100% Original

Warranty: 180 days

 

Product Status	Active
Function	Set(Preset) and Reset
Type	D-Type
Output Type	Complementary
Number of Elements	2
Number of Bits per Element	1
Clock Frequency	24 MHz
Max Propagation Delay @ V, Max CL	90ns @ 15V, 50pF
Trigger Type	Positive Edge
Current - Output High, Low	6.8mA, 6.8mA
Voltage - Supply	3V ~ 18V
Current - Quiescent (Iq)	4 µA
Input Capacitance	5 pF
Operating Temperature	-55°C ~ 125°C (TA)
Mounting Type	Surface Mount
Supplier Device Package	14-SOIC
Package / Case	14-SOIC (0.154", 3.90mm Width)
Base Product Number	CD4013

 

CD4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q\ outputs. These devices can be used for shift register applications, and , by connecting Q\ output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or rest line, respectively.

The CD4013B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

 

Key Features

• Set-Reset capability
• Static flip-flop operation - retains state indefinitely with clock level either "high" or "low"
• Medium-speed operation - 16MHz (typ.) clock toggle rate at 10 V
• Standardized, symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (full package-temperature range) =
• 1 V at VDD = 5 V
• 2 V at VDD = 10 V
• 2.5 V at VDD = 15 V
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices

 

 

Why choosing us

• Located in Shenzhen, the electronic market center of China.
• 100% guarantee components quality: Genuine Original.
• Sufficient stock on your urgent demand.
• Sophisticated colleagues help you solve problems to reduce your risk with on-demand manufacturing
• Faster shipment: In stock components can ship the same day .
• 24 Hours service 

 

Notice:

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