| Customization: | Available |
|---|---|
| Conductive Type: | Unipolar Integrated Circuit |
| Integration: | LSI |
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AM1705DPTP3: MPU AM17X RISC 32-Bit 375MHz 1.8V/3.3V 176-Pin HLQFP - Trays
Package: HLQFP-176
Mfr. Part#: AM1705DPTP3
Mfr.: TI
Datasheet: 
(e-mail or chat us for PDF file)
ROHS Status:
Quality: 100% Original
Warranty: 180 days
| Mounting Style: | SMD/SMT | |
| Package / Case: | HLQFP-176 | |
| Series: | AM1705 | |
| Core: | ARM926EJ-S | |
| Number of Cores: | 1 Core | |
| Data Bus Width: | 32 bit/16 bit | |
| Maximum Clock Frequency: | 375 MHz | |
| L1 Cache Instruction Memory: | 16 kB | |
| L1 Cache Data Memory: | 16 kB | |
| Operating Supply Voltage: | 1.2 V | |
| Minimum Operating Temperature: | - 40 C | |
| Maximum Operating Temperature: | + 105 C | |
| Packaging: | Tray | |
| Brand: | Texas Instruments | |
| Data RAM Size: | 8 kB, 128 kB | |
| Data ROM Size: | 64 kB | |
| Development Kit: | TMDXEVM1707 | |
| I/O Voltage: | 1.8 V, 3.3 V | |
| Interface Type: | Ethernet, I2C, SPI, UART, USB | |
| Memory Type: | L1 Cache, RAM, ROM | |
| Moisture Sensitive: | Yes | |
| Number of Timers/Counters: | 2 Timer | |
| Processor Series: | Sitara | |
| Product Type: | Microprocessors - MPU | |
| Factory Pack Quantity: | 40 | |
| Subcategory: | Microprocessors - MPU | |
| Tradename: | Sitara | |
| Watchdog Timers: | Watchdog Timer | |
| Unit Weight: | 0.065299 oz |
The device is a low-power ARM microprocessor based on an ARM926EJ-S.
The device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices featuring robust operating systems support, rich user interfaces, and high processing performance life through the maximum flexibility of a fully integrated mixed processor solution.
The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-bit, 16-bit, or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.
The ARM core has a coprocessor 15 (CP15), protection module, and data and program memory management units (MMUs) with table look-aside buffers. The ARM core has separate 16KB of instruction and 16-KB data caches. Both memory blocks are four-way associative with virtual index virtual tag (VIVT). The ARM core also has 8KB of RAM (Vector Table) and 64KB of ROM.
The peripheral set includes: a 10/100 Mbps Ethernet MAC (EMAC) with a management data input/output (MDIO) module; two I2C Bus interfaces; 3 multichannel audio serial port (McASP) withserializers and FIFO buffers; two 64-bit general-purpose timers each configurable (one configurable as watchdog);up to 8 banks of 16 pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; three UART interfaces (one with both RTS\ and CTS\); three enhanced high-resolution pulse width modulator (eHRPWM) peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3 capture inputs or 3 auxiliary pulse width modulator (APWM) outputs; two 32-bit enhanced quadrature encoded pulse (eQEP) peripherals; and 2 external memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower memories or peripherals, and a higher speed memory interface (EMIFB) for SDRAM.
The Ethernet Media Access Controller (EMAC) provides an efficient interface between the device and the network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbps and 100 Mbps in either half- or full-duplex mode. Additionally, an MDIO interface is available for PHY configuration.
The I2C, SPI, and USB2.0 ports allow the device to easily control peripheral devices and/or communicate with host processors.
The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.
The device has a complete set of development tools for the ARM processor. These include C compilers and a Windows® debugger interface for visibility into source code execution.
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