IC CD4011BE NAND Gate 4-Element 2-IN CMOS

• Customization: Available
• Conductive Type: Unipolar Integrated Circuit
• Integration: LSI
• Model NO.: CD4011BE
• Technics: Thick Film IC
• MFG.: TI
• D/C: 17+
• Package: DIP-14
• Quality: Genuine New Original
• shape: SMD
• Transport Package: Box
• Origin: China
• HS Code: 8542390000
• Production Capacity: 1000000PCS

Product Description

Description

CD4011BE: NAND Gate 4-Element 2-IN CMOS 14-Pin PDIP Tube

Package: DIP-14

Mfr. Part#: CD4011BE

Mfr.:TI

Datasheet: (e-mail or chat us for PDF file)

ROHS Status: 

Quality: 100% Original

Warranty: 180 days
 

Product Status	Active
Logic Type	NAND Gate
Number of Circuits	4
Number of Inputs	2
Features	-
Voltage - Supply	3V ~ 18V
Current - Quiescent (Max)	1 µA
Current - Output High, Low	3.4mA, 3.4mA
Input Logic Level - Low	1.5V ~ 4V
Input Logic Level - High	3.5V ~ 11V
Max Propagation Delay @ V, Max CL	90ns @ 15V, 50pF
Operating Temperature	-55°C ~ 125°C
Mounting Type	Through Hole
Supplier Device Package	14-PDIP
Package / Case	14-DIP (0.300", 7.62mm)
Base Product Number	CD4011

CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NANDfunction and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix),14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes),and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in14-lead thin shrink small-outline packages (PW suffix).

 

Key Features

• Propagation delay time = 60 ns (typ.) at C_L = 50 pF, V_DD = 10 V
• Buffered inputs and outputs
• Standardized symmetrical output characteristics
• Maximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C
• 100% tested for quiescent current at 20 V
• 5-V, 10-V, and 15-V parametric ratings
• Noise margin (over full package temperature range:
      1 V at V_DD = 5 V
      2 V at V_DD = 10 V
      2.5 at V_DD = 15 V
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"

Company Product Line

 

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Why choosing us

• Located in Shenzhen, the electronic market center of China.
• 100% guarantee components quality: Genuine Original.
• Sufficient stock on your urgent demand.
• Sophisticated colleagues help you solve problems to reduce your risk with on-demand manufacturing
• Faster shipment: In stock components can ship the same day .
• 24 Hours service 

 

Notice:

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