74HC595D SHIFT REGISTER 8BIT 16SOIC IC 74HC595D,118

• shape: hqfp64
• Conductive Type: Bipolar Integrated Circuit
• Integration: MSI
• Shipping Cost: Estimated freight per unit.: about shipping cost and estimated delivery time.
• Currency: US$
• Return&refunds: You can apply for a refund up to 30 days after receipt of the products.
• Model NO.: 74HC595D
• Technics: Semiconductor IC
• Application: Standard Generalized Integrated Circuit
• Type: Digital / Analog IC
• MFG.: NEXPERIA
• D/C: 22+
• Package: SOIC16
• Quality: Genuine New Original
• Transport Package: Box
• Origin: China
• HS Code: 8542399000
• Production Capacity: 1000000PCS
• Package Size: 20.00cm * 20.00cm * 10.00cm
• Package Gross Weight: 1.000kg

Product Description

Description

74HC595D: Highly integrated ethernet transceiver

Mfr. Part#: 74HC595D

Mfr.: NEXPERIA

Datasheet: (e-mail or chat us for PDF file)

ROHS Status: 

Quality: 100% Original

Warranty: ONE YEAR

   

 

Counting Sequence:	Serial to Serial/Parallel
Number of Circuits:	1
Number of Bits:	8 bit
Package / Case:	SOIC-16
Logic Family:	HC
Logic Type:	CMOS
Number of Input Lines:	1
Output Type:	3-State
Propagation Delay Time:	16 ns
Supply Voltage - Min:	2 V
Supply Voltage - Max:	6 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 125 C
Packaging:	Reel
Packaging:	Cut Tape
Packaging:	Reel
Brand:	Nexperia
Function:	Shift Register
Mounting Style:	SMD/SMT
Number of Output Lines:	9
Product Type:	Counter Shift Registers
Factory Pack Quantity:	2500
Subcategory:	Logic ICs
Width:	4 mm
Part # Aliases:	935009160118
Unit Weight:	0.006702 oz

The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

APPLICATION 
• Serial-to-parallel data conversion
• Remote control holding register

 

 

 

 

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