Customization: | Available |
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Conductive Type: | Unipolar Integrated Circuit |
Integration: | LSI |
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SN74HC138NSR: Decoder/Demultiplexer Single 3-to-8 16-Pin SOP T/R
Package: SOP-16
Mfr. Part#: SN74HC138NSR
Mfr.: TI
Datasheet: (e-mail or chat us for PDF file)
ROHS Status:
Quality: 100% Original
Warranty: 180 days
Product: | Decoders / Demultiplexers | |
Logic Family: | HC | |
Number of Input Lines: | 3 Input | |
Number of Output Lines: | 8 Output | |
Propagation Delay Time: | 45 ns | |
Supply Voltage - Min: | 2 V | |
Supply Voltage - Max: | 6 V | |
Minimum Operating Temperature: | - 40 C | |
Maximum Operating Temperature: | + 85 C | |
Mounting Style: | SMD/SMT | |
Package / Case: | SOIC-16 | |
Packaging: | Reel | |
Packaging: | Cut Tape | |
Packaging: | MouseReel | |
Brand: | Texas Instruments | |
Function: | Decoder/Demultiplexer | |
Height: | 1.95 mm | |
High Level Output Current: | - 5.2 mA | |
Length: | 10.3 mm | |
Logic Type: | Decoders/Demultiplexers | |
Low Level Output Current: | 5.2 mA | |
Maximum Clock Frequency: | 28 MHz | |
Number of Circuits: | Single | |
Operating Supply Voltage: | 2 V to 6 V | |
Operating Temperature Range: | - 40 C to + 85 C | |
Pd - Power Dissipation: | 320 mW | |
Product Type: | Encoders, Decoders, Multiplexers & Demultiplexers | |
Series: | SN74HC138 | |
Factory Pack Quantity: | 4000 | |
Subcategory: | Logic ICs | |
Supply Current - Max: | 0.008 mA | |
Technology: | CMOS | |
Width: | 5.3 mm | |
Unit Weight: | 0.007055 oz |
The 'HC138 devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.
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